[Abstract]

Low dimensional semiconductor nanostructures such as nanowires or 2D monolayers have shown numerous potentials in a range of optoelectronic applications. The rational design and fabrication of these nanostructures provides a new methodology for exploiting the excellent physical and chemical properties of the materials.

In this talk, we present our recent effort to design and fabricate low dimensional semiconductor nanostructures. Several systems including 2D semiconducting transition metal dichalcogenides (TMDs), 1D organic-inorganic hybrid perovskite nanowires will be introduced in terms of bottom-up fabrication using structural coherence. In particular, the relationship between the growth environment and the structure of 2D TMDs is elucidated by controlling H2 during CVD growth of MoSe2. We confirm MoSe2 domains nucleate along the [1120] step-edge of a c-sapphire (0001) substrate only if H2 is introduced subsequently to pure Ar condition. Systemic studies, including H2 introduction period, flow rate, and the substrate temperature suggests the step-edge nucleation of MoSe2 is controlled by the surface concentration of H2 on the sapphire substrate. We also demonstrate the role of H2 on the etching of MoSe2 monolayers, by comparing pristine MoSe2 domains and those with excess MoOx. Associated with DFT calculation, we suggest the existence of metal oxide reduces the hydrogen-induced etching of MoSe2 domains, originated from the stable adsorption energy state.

We also present the controlled fabrication of lead halide-based perovskite (LHP) nanowires via vapor-liquidsolid (VLS) growth of PbI2 nanowires and subsequent perovskite conversion. A highly uniform and dense array of [0001] oriented PbI2 nanowires are epitaxially grown on the low lattice mismatch substrate layer. We propose a simple layer growth model to explain the stable growth in [0001] orientation despite the low energetic preference. We also demonstrate the strain-induced nanowire deflection after conversion into CH3NH3PbI3 depends on the transfer process and conversion time, which is essential for the device integration involving transfer process.

Our results propose a general platform for the rational design and fabrication of semiconductor nanostructures, such as heterojunctions or superstructures for future optoelectronic applications.