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High-performance hysteresis-free perovskite transistors through anion engineering

Title of paper
High-performance hysteresis-free perovskite transistors through anion engineering
Author
[노용영교수님 연구실] 음이온 공정을 통한 이력현상 없는 고성능 페로브스카이트 트랜지스터
Publication in journal
Nature Communications 13, 1741 (2022)
Publication date
2022

 

[Abstract]

Despite the impressive development of metal halide perovskites in diverse optoelectronics, progress on high-performance transistors employing state-of-the-art perovskite channels has been limited due to ion migration and large organic spacer isolation. Herein, we report high-performance hysteresis-free p-channel perovskite thin-film transistors (TFTs) based on methylammonium tin iodide (MASnI3) and rationalise the effects of halide(I/Br/Cl) anion engineering on film quality improvement and tin/iodine vacancy suppression, realising a high hole mobility of 20 cm2V−1s−1, current on/off ratio exceeding 107, and threshold voltage of 0V with high operational stability and reproducibility. We reveal ion migration has a negligible contribution to the hysteresis of Sn-based perovskite TFTs; instead, minority carrier trapping is the primary cause. Finally, we integrate the perovskite TFTs with commercialised n-channel indium gallium zinc oxide TFTs on a single chip to construct high-gain complementary inverters, facilitating the development of halide perovskite semiconductors for printable electronics and circuits.

 

DOI: 10.1038/s41467-022-29434-x
LINK: https://www.nature.com/articles/s41467-022-29434-x